Switching voltage regulators are widely used in modern electronic systems for a variety of applications such as computing (server and mobile) and POLs (Point-of-Load Systems) for telecommunications because of their high efficiency and small amount of area/volume consumed by such converters. Widely accepted switching voltage regulator topologies include buck, boost, buck-boost, forward, flyback, half-bridge, full-bridge, and SEPIC topologies. Multiphase buck converters are particularly well suited for providing high current at low voltages needed by high-performance integrated circuits such as microprocessors, graphics processors, and network processors. Buck converters are implemented with active components such as a pulse width modulation (PWM) controller IC (integrated circuit), driver circuitry, one or more phases including power MOSFETs (metal-oxide-semiconductor field-effect transistors), and passive components such as inductors, transformers or coupled inductors, capacitors, and resistors. Multiple phases (power stages) can be connected in parallel to the load through respective inductors to meet high output current requirements.
Losses in switching voltage regulators can be broadly categorized as conduction losses and frequency-dependent losses. At light-load conditions, frequency-dependent losses dominate and cause a steep efficiency roll-off when standard pulse width modulation (PWM) control is employed for output voltage regulation. To maintain high efficiency even at very light load, a control technique known as pulse frequency modulation (PFM) is typically used. PFM is usually entered when the regulator output current reduces past the critical conduction current, which is half the inductor ripple current. The on-time is typically set at the critical conduction point based on the inductance value, input voltage and output voltage. While this offers efficiency improvements over PWM control, the relatively large on-time causes increased ripple voltage and less than optimal efficiency as the output current reduces. For switching voltage regulators used in computing applications, voltage ripple is limited by industry-standard specifications to limit power loss in central processing units (CPUs), field programmable gate arrays (FPGAs), or other digital devices. In order to meet a specified voltage ripple, the PFM entry current is typically limited which in turn sacrifices efficiency for ripple voltage performance. High light-load efficiency is desirable as it results in financial savings for data centers and home users, or increased battery life in mobile applications.
The use of PFM is a standard technique for achieving high efficiency at light-load conditions. Many conventional PFM approaches use a constant PFM on-time. However, constant PFM on-time causes the output voltage ripple to increase over PFM operation.